Altera cyclone V Technical Reference page 16

TOC-16
HPS-to-FPGA MPU Event Interface.....................................................................................................29-14
Interrupts Interface..................................................................................................................................29-14
HPS-to-FPGA Debug APB Interface.................................................................................................... 29-16
FPGA-to-HPS System Trace Macrocell Hardware Event Interface...................................................29-16
HPS-to-FPGA Cross-Trigger Interface.................................................................................................29-17
HPS-to-FPGA Trace Port Interface....................................................................................................... 29-17
FPGA-to-HPS DMA Handshake Interface...........................................................................................29-18
Boot from FPGA Interface......................................................................................................................29-19
General Purpose Input Interface............................................................................................................29-20
Document Revision History...................................................................................................................29-21
Booting and Configuration................................................................................ A-1
Boot Overview............................................................................................................................................. A-1
FPGA Configuration Overview.................................................................................................................A-1
Booting and Configuration Options.........................................................................................................A-2
Boot Definitions.......................................................................................................................................... A-5
Boot ROM Flow.........................................................................................................................................A-26
Typical Preloader Boot Flow....................................................................................................................A-28
FPGA Configuration.................................................................................................................................A-33
Document Revision History.................................................................................................................... A-35
Altera Corporation
HPS Memory Interface Simulation........................................................................................... 29-13
Reset.................................................................................................................................................. A-5
Boot ROM........................................................................................................................................ A-5
Boot Select........................................................................................................................................ A-6
Flash Memory Devices for Booting............................................................................................ A-13
Clock Select.................................................................................................................................... A-25
I/O Configuration......................................................................................................................... A-25
L4 Watchdog 0 Timer................................................................................................................... A-26
Preloader.........................................................................................................................................A-26
U-Boot Loader...............................................................................................................................A-26
HPS State on Entry to the Preloader...........................................................................................A-31
Shared Memory............................................................................................................................. A-31
Loading the Preloader Image.......................................................................................................A-32
Full Configuration.........................................................................................................................A-33
Partial Reconfiguration.................................................................................................................A-34