Altera cyclone V Technical Reference page 212

5-18
System Manager Module Address Map
Register
MIXED2IO6 on page 5-
156
MIXED2IO7 on page 5-
157
GPLINMUX48 on page 5-
157
GPLINMUX49 on page 5-
158
GPLINMUX50 on page 5-
159
GPLINMUX51 on page 5-
159
GPLINMUX52 on page 5-
160
GPLINMUX53 on page 5-
161
GPLINMUX54 on page 5-
162
GPLINMUX55 on page 5-
162
GPLINMUX56 on page 5-
163
GPLINMUX57 on page 5-
164
GPLINMUX58 on page 5-
165
GPLINMUX59 on page 5-
165
GPLINMUX60 on page 5-
166
GPLINMUX61 on page 5-
167
GPLINMUX62 on page 5-
168
GPLINMUX63 on page 5-
168
GPLINMUX64 on page 5-
169
GPLINMUX65 on page 5-
170
Altera Corporation
Offset Width Acces
s
0x570 32 RW
0x574 32 RW
0x578 32 RW
0x57C 32 RW
0x580 32 RW
0x584 32 RW
0x588 32 RW
0x58C 32 RW
0x590 32 RW
0x594 32 RW
0x598 32 RW
0x59C 32 RW
0x5A0 32 RW
0x5A4 32 RW
0x5A8 32 RW
0x5AC 32 RW
0x5B0 32 RW
0x5B4 32 RW
0x5B8 32 RW
0x5BC 32 RW
Reset Value
emac1_rx_d2 Mux Selection
0x0
Register
emac1_rx_d3 Mux Selection
0x0
Register
GPIO/LoanIO 48 Input Mux
0x0
Selection Register
GPIO/LoanIO 49 Input Mux
0x0
Selection Register
GPIO/LoanIO 50 Input Mux
0x0
Selection Register
GPIO/LoanIO 51 Input Mux
0x0
Selection Register
GPIO/LoanIO 52 Input Mux
0x0
Selection Register
GPIO/LoanIO 53 Input Mux
0x0
Selection Register
GPIO/LoanIO 54 Input Mux
0x0
Selection Register
GPIO/LoanIO 55 Input Mux
0x0
Selection Register
GPIO/LoanIO 56 Input Mux
0x0
Selection Register
GPIO/LoanIO 57 Input Mux
0x0
Selection Register
GPIO/LoanIO 58 Input Mux
0x0
Selection Register
GPIO/LoanIO 59 Input Mux
0x0
Selection Register
GPIO/LoanIO 60 Input Mux
0x0
Selection Register
GPIO/LoanIO 61 Input Mux
0x0
Selection Register
GPIO/LoanIO 62 Input Mux
0x0
Selection Register
GPIO/LoanIO 63 Input Mux
0x0
Selection Register
GPIO/LoanIO 64 Input Mux
0x0
Selection Register
GPIO/LoanIO 65 Input Mux
0x0
Selection Register
cv_5v4
2016.10.28
Description
System Manager
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