Altera cyclone V Technical Reference page 487

cv_5v4
2016.10.28
Bit
6
uart0
5
i2c3
4
i2c2
3
i2c1
System Interconnect
Send Feedback
Name
Controls whether secure or non-secure masters can
access the UART 0 slave.
Value
0x0
0x1
Controls whether secure or non-secure masters can
access the I2C3 (EMAC 1) slave.
Value
0x0
0x1
Controls whether secure or non-secure masters can
access the I2C2 (EMAC 0) slave.
Value
0x0
0x1
Controls whether secure or non-secure masters can
access the I2C1 slave.
Value
0x0
0x1
Description
Description
The slave can only be accessed by a secure
master.
The slave can only be accessed by a secure or
non-secure masters.
Description
The slave can only be accessed by a secure
master.
The slave can only be accessed by a secure or
non-secure masters.
Description
The slave can only be accessed by a secure
master.
The slave can only be accessed by a secure or
non-secure masters.
Description
The slave can only be accessed by a secure
master.
The slave can only be accessed by a secure or
non-secure masters.
7-39
l4sp
Access Reset
WO 0x0
WO 0x0
WO 0x0
WO 0x0
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