Resets - Altera cyclone V Technical Reference

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

6-8

Resets

Related Information
Clock Manager
For more information, including minimum and maximum clock frequencies, refer to the Clock Manager
chapter.
Resets
The reset manager provides the
warm resets.
Because glitches can happen on the output clocks during a warm reset, the scan manager temporarily
stops generation of the JTAG-AP and I/O configuration clocks. This action ensures that a warm reset does
not cause output clock glitches.
Before asserting warm reset, the reset manager sends a request to the scan manager. The scan manager
stops the output clock generation and acknowledges the reset manager. The reset manager then issues the
warm reset. To enable this warm reset handshake, configure the
register.
ctrl
Related Information
Reset Manager
For more information about reset handshaking, refer to the Reset Manager chapter.
System Manager
For information about the system manager, including details about configuring the
to the System Manager chapter.
Scan Manager Address Map and Register Definitions
This section lists the scan manager register address map and describes the registers.
Related Information
Introduction to the Hard Processor System
The base addresses of all modules are also listed in the Introduction to the Hard Processor chapter.
Cyclone V Address Map and Register Definitions
Web-based address map and register definitions
JTAG-AP Register Name Cross Reference Table
To clarify how Altera uses the JTAG-AP, the ARM registers are renamed in the SoC device. The following
table cross references the ARM and Altera register names.
Table 6-3: JTAG-AP Register Names
Altera Register Name
stat
en
fifosinglebyte
fifodoublebyte
Altera Corporation
on page 2-1
scan_manager_rst_n
on page 3-1
on page 5-1
reset signal to the scan manager for both cold and
scanmgrhsen
on page 1-1
ARM Register Name
(control/status word)
CSW
PSEL
for writes,
BWFIFO1
BRFIFO1
for writes,
BWFIFO2
BRFIFO2
2016.10.28
bit of the reset manager
register, refer
ctrl
for reads
for reads
Scan Manager
Send Feedback
cv_5v4

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents