Altera cyclone V Technical Reference page 204

5-10
System Manager Module Address Map
Base Address:
System Manager Module
Register
siliconid1 on page 5-
23
siliconid2 on page 5-
24
wddbg on page 5-24
bootinfo on page 5-
26
hpsinfo on page 5-28
parityinj on page 5-
29
FPGA Interface Group
Register
gbl on page 5-31
indiv on page 5-32
module on page 5-35
Scan Manager Group
Register
ctrl on page 5-36
Freeze Control Group
Register
vioctrl on page 5-38
hioctrl on page 5-39
src on page 5-42
hwctrl on page 5-42
Altera Corporation
0xFFD08000
Offset Width Acces
0x0 32
0x4 32
0x10 32
0x14 32
0x18 32
0x1C 32
Offset Width Acces
0x20 32
0x24 32
0x28 32
Offset Width Acces
0x30 32
Offset Width Acces
0x40 32
0x50 32
0x54 32
0x58 32
Reset Value
s
Silicon ID1 Register
RO 0x1
Silicon ID2 Register
RO 0x0
L4 Watchdog Debug Register
RW 0xF
Boot Info Register
RO 0x0
HPS Info Register
RO 0x0
Parity Fail Injection Register
RW 0x0
Reset Value
s
Global Disable Register
RW 0x1
Individual Disable Register
RW 0xFF
Module Disable Register
RW 0x0
Reset Value
s
Scan Manager Control Register
RW 0x0
Reset Value
s
VIO Control Register
RW 0x0
HIO Control Register
RW 0xE0
Source Register
RW 0x0
Hardware Control Register
RW 0x5
cv_5v4
2016.10.28
Description
Description
Description
Description
System Manager
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