Altera cyclone V Technical Reference page 543

Hard processor system
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cv_5v4
2016.10.28
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
fn_mod_bm_iss Fields
Bit
1
wr
0
rd
fn_mod
Sets the block issuing capability to multiple or single outstanding transactions.
Module Instance
l3regs
Offset:
0x26108
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
System Interconnect
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software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
Value
0x0
0x1
Value
0x0
0x1
0xFF800000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Reserved
Description
Description
Multiple outstanding write transactions
Only a single outstanding write transaction
Description
Multiple outstanding read transactions
Only a single outstanding read transaction
Base Address
fn_mod
21
20
19
18
5
4
3
2
Access
Register Address
0xFF826108
7-95
17
16
1
0
wr
rd
RW
RW 0x0
0x0
Reset
RW
0x0
RW
0x0
Altera Corporation

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