Altera cyclone V Technical Reference page 210

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

5-16
System Manager Module Address Map
Register
GENERALIO11
5-135
GENERALIO12
5-136
GENERALIO13
5-136
GENERALIO14
5-137
GENERALIO15
5-138
GENERALIO16
5-139
GENERALIO17
5-139
GENERALIO18
5-140
GENERALIO19
GENERALIO20
GENERALIO21
GENERALIO22
GENERALIO23
GENERALIO24
GENERALIO25
GENERALIO26
GENERALIO27
MIXED1IO0
MIXED1IO1
MIXED1IO2
MIXED1IO3
MIXED1IO4
MIXED1IO5
MIXED1IO6
MIXED1IO7
Altera Corporation
Offset
on page
0x4AC
on page
0x4B0
on page
0x4B4
on page
0x4B8
on page
0x4BC
on page
0x4C0
on page
0x4C4
on page
0x4C8
0x4CC
0x4D0
0x4D4
0x4D8
0x4DC
0x4E0
0x4E4
0x4E8
0x4EC
0x500
0x504
0x508
0x50C
0x510
0x514
0x518
0x51C
Width Acces
Reset Value
s
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
32
RW
0x0
Description
spim0_miso Mux Selection
Register
spim0_ss0 Mux Selection Register
uart0_rx Mux Selection Register
uart0_tx Mux Selection Register
i2c0_sda Mux Selection Register
i2c0_scl Mux Selection Register
can0_rx Mux Selection Register
can0_tx Mux Selection Register
spis1_clk Mux Selection Register
spis1_mosi Mux Selection
Register
spis1_miso Mux Selection
Register
spis1_ss0 Mux Selection Register
uart1_rx Mux Selection Register
uart1_tx Mux Selection Register
i2c1_sda Mux Selection Register
i2c1_scl Mux Selection Register
spim0_ss0_alt Mux Selection
Register
nand_ale Mux Selection Register
nand_ce Mux Selection Register
nand_cle Mux Selection Register
nand_re Mux Selection Register
nand_rb Mux Selection Register
nand_dq0 Mux Selection Register
nand_dq1 Mux Selection Register
nand_dq2 Mux Selection Register
System Manager
Send Feedback
cv_5v4
2016.10.28

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents