Altera cyclone V Technical Reference page 899

13-78
Device parameters Register Descriptions
Module Instance
nandregs
Offset:
0x2B0
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
watchdog_reset_count Fields
Bit
15:0
value
Device parameters Register Descriptions
Controller reads device parameters after initialization and stores in the following registers for software
Offset:
0x300
manufacturer_id
device_id
device_param_0
device_param_1
device_param_2
logical_page_data_size
Logical page data area size in bytes
logical_page_spare_size
Logical page data area size in bytes
revision
on page 13-84
Controller revision number
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
The controller waits for this number of cycles before
issuing a watchdog timeout interrupt. The value in
this register is multiplied internally by 32 in the
controller to form the final watchdog counter.
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Base Address
0xFFB80000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
value
RW 0x5B9A
Description
Register Address
0xFFB802B0
21 20 19 18
5 4 3 2
Access
NAND Flash Controller
cv_5v4
2016.10.28
17 16
1 0
Reset
RW 0x5B9A
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