Altera cyclone V Technical Reference page 215

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
Register
GPLMUX35
on page 5-
202
GPLMUX36
on page 5-
203
GPLMUX37
on page 5-
204
GPLMUX38
on page 5-
205
GPLMUX39
on page 5-
206
GPLMUX40
on page 5-
206
GPLMUX41
on page 5-
207
GPLMUX42
on page 5-
208
GPLMUX43
on page 5-
209
GPLMUX44
on page 5-
210
GPLMUX45
on page 5-
210
GPLMUX46
on page 5-
211
GPLMUX47
on page 5-
212
GPLMUX48
on page 5-
213
GPLMUX49
on page 5-
214
GPLMUX50
on page 5-
214
GPLMUX51
on page 5-
215
GPLMUX52
on page 5-
216
GPLMUX53
on page 5-
217
GPLMUX54
on page 5-
218
System Manager
Send Feedback
Offset
Width Acces
s
0x660
32
RW
0x664
32
RW
0x668
32
RW
0x66C
32
RW
0x670
32
RW
0x674
32
RW
0x678
32
RW
0x67C
32
RW
0x680
32
RW
0x684
32
RW
0x688
32
RW
0x68C
32
RW
0x690
32
RW
0x694
32
RW
0x698
32
RW
0x69C
32
RW
0x6A0
32
RW
0x6A4
32
RW
0x6A8
32
RW
0x6AC
32
RW
System Manager Module Address Map
Reset Value
GPIO/LoanIO 35 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 36 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 37 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 38 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 39 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 40 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 41 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 42 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 43 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 44 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 45 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 46 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 47 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 48 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 49 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 50 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 51 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 52 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 53 Output/Output
0x0
Enable Mux Selection Register
GPIO/LoanIO 54 Output/Output
0x0
Enable Mux Selection Register
5-21
Description
Altera Corporation

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents