Altera cyclone V Technical Reference page 459

Hard processor system
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cv_5v4
2016.10.28
SCU and L2 Registers Region
The SCU and L2 registers region provides access to internally-decoded MPU registers (SCU and L2).
On-Chip RAM Region
The on-chip RAM is always mapped near the top of the address space, independent of the boot region
contents.
Related Information
HPS Address Spaces
Figure showing the SDRAM window boundaries at reset
The SDRAM Region
Information about L2 cache filtering, including the address filter start and address filter end registers
Bit Fields for Modifying the Memory Map
SDRAM Address Space
The SDRAM address space is 4 GB. Depending on register settings, portions of it are visible to all masters.
Related Information
HPS Address Spaces
Figure showing the SDRAM window boundaries at reset
Address Remapping
The system interconnect supports address remapping through the
Remapping allows software to control which memory device (SDRAM, on-chip RAM, or boot ROM) is
accessible at address 0x0 and the accessibility of the HPS-to-FPGA and lightweight HPS-to-FPGA bridges.
The
remap
masters can manipulate
• MPU
• FPGA-to-HPS bridge
• DAP
The remapping bits in the
priority when multiple slaves are remapped to the same address. Each bit allows different combinations of
address maps to be formed. There is only one remapping register available in the GPV, so modifying the
register affects all memory maps of all the masters of the system interconnect.
remap
The effects of the remap bits can be categorized in the following groups:
• MPU master interface
• L2 cache master 0 interface
• Non-MPU master interfaces
• DMA master interface
• Master peripheral interfaces
• Debug Access Port (DAP) master interface
• FPGA-to-HPS bridge master interface
System Interconnect
Send Feedback
on page 1-15
on page 9-11
on page 1-15
register is one of the NIC-301 Global Programmers View (GPV) registers. The following L3
, because it maps into their address space:
remap
register are not mutually exclusive. The lowest order remap bit has higher
remap
on page 7-12
remap
SDRAM Address Space
register in the
group.
l3regs
Altera Corporation
7-11

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