Altera cyclone V Technical Reference page 297

Hard processor system
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cv_5v4
2016.10.28
GPLMUX39
Selection between GPIO and LoanIO output and output enable for GPIO39 and LoanIO39. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX40
Selection between GPIO and LoanIO output and output enable for GPIO40 and LoanIO40. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX41
Selection between GPIO and LoanIO output and output enable for GPIO41 and LoanIO41. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX42
Selection between GPIO and LoanIO output and output enable for GPIO42 and LoanIO42. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX43
Selection between GPIO and LoanIO output and output enable for GPIO43 and LoanIO43. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX44
Selection between GPIO and LoanIO output and output enable for GPIO44 and LoanIO44. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX45
Selection between GPIO and LoanIO output and output enable for GPIO45 and LoanIO45. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX46
Selection between GPIO and LoanIO output and output enable for GPIO46 and LoanIO46. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX47
Selection between GPIO and LoanIO output and output enable for GPIO47 and LoanIO47. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
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Pin Mux Control Group Register Descriptions
5-103
Altera Corporation

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