Altera cyclone V Technical Reference page 478

7-30
L3 (NIC-301) GPV Registers Address Map
SDMMC
Register
fn_mod_ahb on page 7-
106
read_qos on page 7-
107
write_qos on page 7-
108
fn_mod on page 7-109
DMA
Register
read_qos on page 7-
110
write_qos on page 7-
111
fn_mod on page 7-112
FPGA2HPS
Register
wr_tidemark
7-113
read_qos on page 7-
113
write_qos on page 7-
114
fn_mod on page 7-115
Altera Corporation
Offset
0x44028
0x44100
0x44104
0x44108
Offset
0x45100
0x45104
0x45108
Offset
on page 0x46040
0x46100
0x46104
0x46108
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
32 RW 0x0
Width Acces Reset Value
s
32 RW 0x4
32 RW 0x0
32 RW 0x0
32 RW 0x0
Description
Functionality Modification AHB
Register
Read Channel QoS Value
Write Channel QoS Value
Issuing Functionality Modification
Register
Description
Read Channel QoS Value
Write Channel QoS Value
Issuing Functionality Modification
Register
Description
Write Tidemark
Read Channel QoS Value
Write Channel QoS Value
Issuing Functionality Modification
Register
System Interconnect
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cv_5v4
2016.10.28