Altera cyclone V Technical Reference page 536

Hard processor system
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7-88
fn_mod
Module Instance
l3regs
Offset:
0x23040
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
wr_tidemark Fields
Bit
3:0
level
fn_mod
Sets the block issuing capability to multiple or single outstanding transactions.
Module Instance
l3regs
Offset:
0x23108
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Stalls the transaction in the write data FIFO until the
number of occupied slots in the write data FIFO
exceeds the level. Note that the transaction is released
before this level is achieved if the network receives the
WLAST beat or the write FIFO becomes full.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Base Address
0xFF800000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
0xFF800000
Register Address
0xFF823040
21
20
19
18
5
4
3
2
Access
Register Address
0xFF823108
System Interconnect
cv_5v4
2016.10.28
17
16
1
0
level
RW 0x4
Reset
RW
0x4
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