Dma Registers - Altera cyclone V Technical Reference

13-38
NAND Flash Controller Module Registers (AXI Slave) Address Map
Register
err_block_addr1
page 13-103
intr_status2
13-104
intr_en2 on page 13-
105
page_cnt2 on page 13-
107
err_page_addr2
page 13-108
err_block_addr2
page 13-108
intr_status3
13-109
intr_en3 on page 13-
111
page_cnt3 on page 13-
112
err_page_addr3
page 13-113
err_block_addr3
page 13-114
ECC registers
Register
ECCCorInfo_b01
page 13-115
ECCCorInfo_b23
page 13-116

DMA registers

Register
dma_enable on page
13-117
dma_intr on page 13-
118
Altera Corporation
Offset
on 0x4A0
on page 0x4B0
0x4C0
0x4D0
on 0x4E0
on 0x4F0
on page 0x500
0x510
0x520
on 0x530
on 0x540
Offset
on 0x650
on 0x660
Offset
0x700
0x720
Width Acces Reset Value
s
32 RO 0x0
32 RW 0x0
32 RW 0x2000
32 RO 0x0
32 RO 0x0
32 RO 0x0
32 RW 0x0
32 RW 0x2000
32 RO 0x0
32 RO 0x0
32 RO 0x0
Width Acces Reset Value
s
32 RO 0x0
32 RO 0x0
Width Acces Reset Value
s
32 RW 0x0
32 RW 0x0
cv_5v4
2016.10.28
Description
Description
Description
NAND Flash Controller
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