Reset Manager Block Diagram And System Integration - Altera cyclone V Technical Reference

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Reset Manager Block Diagram and System Integration

The HPS supports the following reset types:
• System cold reset
• Used to ensure the HPS is placed in a default state sufficient for software to boot
• Triggered by a power-on reset and other sources
• Resets all HPS logic that can be reset
• Affects all reset domains
• System warm reset
• Occurs after HPS has already completed a cold reset
• Used to recover system from a non-responsive condition
• Resets a subset of the HPS state reset by a cold reset
• Only affects the system reset domain, which allows debugging (including trace) to operate through
the warm reset
• Debug reset
• Used to recover debug logic from a non-responsive condition
• Only affects the debug reset domain
Reset Manager Block Diagram and System Integration
The following figure shows a block diagram of the reset manager in the SoC device. For clarity, reset-
related handshaking signals to other HPS modules and to the clock manager module are omitted.
Altera Corporation
cv_5v4
2016.10.28
Reset Manager
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