Preloader Handoff Information; Clocks; Resets; System Manager Address Map And Register Definitions - Altera cyclone V Technical Reference

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2016.10.28
either a single or double bit error as selected. When the data is read back, the ECC logic detects the
single or double bit error appropriately. The injection request cannot be cancelled, and the number
of injections is limited to once every five MPU cycles.
The system manager can also inject parity failures into the parity-protected RAM in the MPU L2 to test
the parity failure interrupt handler. Set the bits of the parity fail injection register (
parity failures.
Note: Injecting parity failures into the parity-protected RAM in the MPU L2 causes the interrupt to be
raised immediately. There is no actual error injected and the data is not corrupted. Furthermore,
there is no need for a memory operation to actually be performed for the interrupt to be raised.

Preloader Handoff Information

The system manager provides eight 32-bit registers to store handoff information between the preloader
and the operating system. The preloader can store any information in these registers. These register
contents have no impact on the state of the HPS hardware. When the operating system kernel boots, it
retrieves the information by reading the preloader to OS handoff information register array. These
registers are reset only by a cold reset.

Clocks

The system manager is driven by a clock generated by the clock manager.
Related Information
Clock Manager

Resets

The system manager receives two reset signals from the reset manager. The
driven on a cold or warm reset and the
This function allows the system manager to reset some CSR fields on either a cold or warm reset and
others only on a cold reset.
Related Information
Reset Manager

System Manager Address Map and Register Definitions

The address map and register definitions for the HPS-FPGA bridges consist of the following regions:
• System Manager Module
Related Information
Introduction to the Hard Processor System
•
The base addresses of all modules are also listed in the Introduction to the Hard Processor System
chapter in the Cyclone V Device Handbook, Volume 3.
http://www.altera.com/literature/hb/cyclone-v/hps.html
•
System Manager Module Address Map
Registers in the System Manager module
System Manager
Send Feedback
on page 2-1
sys_manager_cold_rst_n
on page 3-1
Preloader Handoff Information
signal is driven only on a cold reset.
on page 1-1
) to inject
parityinj
signal is
sys_manager_rst_n
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