Altera cyclone V Technical Reference page 902

Hard processor system
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cv_5v4
2016.10.28
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
device_param_0 Fields
Bit
7:0
value
device_param_1
Module Instance
nandregs
Offset:
0x330
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
NAND Flash Controller
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software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
3rd byte relating to Device Signature. This register is
updated only for Legacy NAND devices.
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
device_param_1
21
20
19
18
5
4
3
2
value
RO 0x0
Access
Register Address
0xFFB80330
21
20
19
18
5
4
3
2
value
RO 0x0
13-81
17
16
1
0
Reset
RO
0x0
17
16
1
0
Altera Corporation

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