Altera cyclone V Technical Reference page 227

cv_5v4
2016.10.28
31 30
15 14
indiv Fields
Bit
7
crosstrigintf
6
stmeventintf
4
traceintf
System Manager
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29 28 27 26
13 12 11 10
Reserved
Name
Used to disable the FPGA Fabric from sending
triggers to HPS debug logic. Note that this doesn't
prevent the HPS debug logic from sending triggers to
the FPGA Fabric.
Value
0x0
0x1
Used to disable the STM event interface. This
interface allows logic in the FPGA fabric to trigger
events to the STM debug module in the HPS.
Value
0x0
0x1
Used to disable the trace interface. This interface
allows the HPS debug logic to send trace data to logic
in the FPGA fabric.
Value
0x0
0x1
Bit Fields
25 24 23 22
Reserved
9 8 7 6
cross stmev
trigi entin
ntf tf
RW RW
0x1 0x1
Description
Description
FPGA Fabric cannot send triggers.
FPGA Fabric can send triggers.
Description
STM event interface is disabled. Logic in the
FPGA fabric cannot trigger STM events.
STM event interface is enabled. Logic in the
FPGA fabric can trigger STM events.
Description
Trace interface is disabled. HPS debug logic
cannot send trace data to the FPGA fabric.
Trace interface is enabled. Other registers in
the HPS debug logic must be programmmed
to actually send trace data to the FPGA
fabric.
21 20 19 18
5 4 3 2
Reser trace bscan confi
ved intf intf gioin
tf
RW RW
0x1 0x1 RW
0x1
Access
5-33
indiv
17 16
1 0
jtage rstreqin
nintf tf
RW RW 0x1
0x1
Reset
RW 0x1
RW 0x1
RW 0x1
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