Altera cyclone V Technical Reference page 607

Hard processor system
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cv_5v4
2016.10.28
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
periph_id_3 Fields
Bit
7:4
rev_and
3:0
cust_mod_num
comp_id_0
Component ID0
Module Instance
hps2fpgaregs
Offset:
0x1FF0
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
HPS-FPGA Bridges
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software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Revision
Customer Model Number
0xFF500000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Bit Fields
25
24
23
22
Reserved
9
8
7
6
rev_and
RO 0x0
Description
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
comp_id_0
21
20
19
18
5
4
3
2
cust_mod_num
RO 0x0
Access
Register Address
0xFF501FF0
21
20
19
18
5
4
3
2
preamble
RO 0xD
8-25
17
16
1
0
Reset
RO
0x0
RO
0x0
17
16
1
0
Altera Corporation

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