Altera cyclone V Technical Reference page 171

4-28
gpio_intmask
gpio_intmask Fields
Bit
11
fpo
10
cdp
9
nsp
8
ncp
Altera Corporation
Name
Controls whether an interrupt for FPGA_POWER_
ON can generate an interrupt to the interrupt
controller by not masking it. The unmasked status can
be read as well as the resultant status after masking.
Value
0x0
0x1
Controls whether an interrupt for CONF_DONE Pin
can generate an interrupt to the interrupt controller
by not masking it. The unmasked status can be read as
well as the resultant status after masking.
Value
0x0
0x1
Controls whether an interrupt for nSTATUS Pin can
generate an interrupt to the interrupt controller by
not masking it. The unmasked status can be read as
well as the resultant status after masking.
Value
0x0
0x1
Controls whether an interrupt for nCONFIG Pin can
generate an interrupt to the interrupt controller by
not masking it. The unmasked status can be read as
well as the resultant status after masking.
Value
0x0
0x1
Description
Description
Unmask Interrupt
Mask Interrupt
Description
Unmask Interrupt
Mask Interrupt
Description
Unmask Interrupt
Mask Interrupt
Description
Unmask Interrupt
Mask Interrupt
cv_5v4
2016.10.28
Access Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x0
FPGA Manager
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