Altera cyclone V Technical Reference page 182

cv_5v4
2016.10.28
Bit
0
ns
gpio_raw_intstatus
Reports on raw interrupt status for each GPIO input. The raw interrupt status excludes the effects of
masking.
Module Instance
fpgamgrregs
Offset:
0x844
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
Reserved
gpio_raw_intstatus Fields
Bit
11
fpo
FPGA Manager
Send Feedback
Name
Indicates whether nSTATUS has an active interrupt
or not (after masking).
0x0
0x1
0xFF706000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
fpo cdp
RO RO
0x0 0x0
Name
Indicates whether FPGA_POWER_ON has an active
interrupt or not (before masking).
0x0
0x1
Description
Value Description
Inactive
Active
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
nsp ncp prd pre
RO RO RO RO
0x0 0x0 0x0 0x0
Description
Value Description
Inactive
Active
gpio_raw_intstatus
Access
Register Address
0xFF706844
21 20 19 18
5 4 3 2
prr ccd crc id
RO RO RO RO
0x0 0x0 0x0 0x0
Access
4-39
Reset
RO 0x0
17 16
1 0
cd ns
RO RO 0x0
0x0
Reset
RO 0x0
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