Altera cyclone V Technical Reference page 904

cv_5v4
2016.10.28
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
logical_page_data_size Fields
Bit
15:0
value
logical_page_spare_size
Logical page data area size in bytes
Module Instance
nandregs
Offset:
0x360
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
NAND Flash Controller
Send Feedback
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
Logical page spare area size in bytes. If multiple
devices are connected on a single chip select, physical
page data size will be multiplied by the number of
devices to arrive at logical page size.
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Bit Fields
25 24 23 22
Reserved
9 8 7 6
value
RO 0x0
Description
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
value
RO 0x0
logical_page_spare_size
21 20 19 18
5 4 3 2
Access
Register Address
0xFFB80360
21 20 19 18
5 4 3 2
13-83
17 16
1 0
Reset
RO 0x0
17 16
1 0
Altera Corporation