Altera cyclone V Technical Reference page 193

4-50
gpio_config_reg1
Bit
8
hw_porta
7
portd_single_ctl
6
portc_single_ctl
5
portb_single_ctl
4
porta_single_ctl
3:2
num_ports
1:0
apb_data_width
Altera Corporation
Name
The value is fixed to enable Port A configuration to be
controlled by software only.
Value
0x0
Indicates the mode of operation of Port D to be
software controlled only. Ignored because there is no
Port D in the GPIO.
Value
0x1
Indicates the mode of operation of Port C to be
software controlled only. Ignored because there is no
Port C in the GPIO.
Value
0x1
Indicates the mode of operation of Port B to be
software controlled only. Ignored because there is no
Port B in the GPIO.
Value
0x1
Indicates the mode of operation of Port A to be
software controlled only.
Value
0x1
The value of this register is fixed at one port (Port A).
Value
0x0
Fixed to support an APB data bus width of 32-bits.
Value
0x2
Description
Description
Software Configuration Control Enabled
Description
Software Enabled Individual Port Control
Description
Software Enabled Individual Port Control
Description
Software Enabled Individual Port Control
Description
Software Enabled Individual Port Control
Description
Number of GPIO Ports = 1
Description
APB Data Width = 32-bits
cv_5v4
2016.10.28
Access Reset
RO 0x0
RO 0x1
RO 0x1
RO 0x1
RO 0x1
RO 0x0
RO 0x2
FPGA Manager
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