Nand Flash Controller Programming Model - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Figure 13-5: Bad Block Marker
The following figure shows an example of how the NAND flash controller can skip over a bad block
marker. In this example, the flash device has a 2-KB page with a 64-byte spare area. A 14-byte sector ECC
is shown, with 8 byte per sector correction.
Sector 0 ECC 0
512 Bytes 14 Bytes
Related Information
Transfer Mode Operations
For detailed information about configuring the NAND flash controller for default, spare, or main+spare
area transfer mode.
Error Correction Status
The ECC error correction information (
correction information for each read or write that the NAND flash controller performs. The
ECCCorInfo_b01
uncor_err_b0
At the end of data correction for the transaction in progress,
number of corrections applied to any ECC sector in the transaction. In addition, this register indicates
whether the transaction as a whole has correctable errors, uncorrectable errors, or no errors at all. A
transaction has no errors when none of the ECC sectors in the transaction has any errors. The transaction
is marked as uncorrectable if any one of the sectors is uncorrectable. The transaction is marked as correct‐
able if any one sector has correctable errors and none is uncorrectable.
At the end of each transaction, the host must read this register. The value of this register provides error
data to the host about the block. The host can take corrective action after the number of correctable errors
encountered reaches a particular threshold value.

NAND Flash Controller Programming Model

This section describes how the NAND flash controller is to be programmed by software running on the
microprocessor unit (MPU).
Note: If you write a configuration register and follow it up with a data operation that is dependent on the
value of this configuration register, Altera recommends that you read the value of the register before
performing the data operation. This read operation ensures that the posted write of the register is
completed and takes effect before the data operation is issued to the NAND flash controller.
NAND Flash Controller
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2-KByte Main Area
Sector 1 ECC 1
512 Bytes 14 Bytes
on page 13-27
ECCCorInfo_b01
register contains ECC error correction information in the
fields.
Sector 2 ECC 2 Sector 3
512 Bytes 14 Bytes 470 Bytes
) register, in the
ECCCorInfo_b01
Error Correction Status
Bad Block Marker
64-Byte Spare Area
Sector 3 ECC 3
2 Bytes 42 Bytes 14 Bytes
(Skip)
group, contains error
ecc
and
max_errors_b0
holds the maximum
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13-21
Other Flags
6 Bytes