Altera cyclone V Technical Reference page 659

Hard processor system
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cv_5v4
2016.10.28
GIC
Source Block
Interrupt
Number
188
SPI2
189
SPI3
190
I2C0
191
I2C1
192
I2C2
Cortex-A9 Microprocessor Unit Subsystem
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Interrupt Name
spi2_IRQ
spi3_IRQ
i2c0_IRQ
i2c1_IRQ
i2c2_IRQ
GIC Interrupt Map for the Cyclone V SoC HPS
Combined Interrupts
This interrupt combines:
,
txe_intr
ssi_txo_intr
,
rxf_intr
ssi_rxo_intr
, and
rxu_intr
ssi_mst_intr
This interrupt combines:
,
txe_intr
ssi_txo_intr
,
rxf_intr
ssi_rxo_intr
, and
rxu_intr
ssi_mst_intr
This interrupt combines:
,
under_intr
ic_rx_full_intr
,
ic_tx_over_intr
ic_tx_
,
empty_intr
ic_rd_req_intr
,
ic_tx_abrt_intr
ic_rx_done_
,
intr
ic_activity_intr
,
stop_det_intr
ic_start_det_
, and
intr
ic_gen_call_intr
This interrupt combines:
,
under_intr
ic_rx_full_intr
,
ic_tx_over_intr
ic_tx_
,
empty_intr
ic_rd_req_intr
,
ic_tx_abrt_intr
ic_rx_done_
,
intr
ic_activity_intr
,
stop_det_intr
ic_start_det_
, and
intr
ic_gen_call_intr
This interrupt combines:
,
under_intr
ic_rx_full_intr
,
ic_tx_over_intr
ic_tx_
,
empty_intr
ic_rd_req_intr
,
ic_tx_abrt_intr
ic_rx_done_
,
intr
ic_activity_intr
,
stop_det_intr
ic_start_det_
, and
intr
ic_gen_call_intr
9-23
Triggering
Level
ssi_
,
ssi_
,
ssi_
.
Level
ssi_
,
ssi_
,
ssi_
.
Level
ic_rx_
,
,
,
ic_
.
Level
ic_rx_
,
,
,
ic_
.
Level
ic_rx_
,
,
,
ic_
.
Altera Corporation

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