Altera cyclone V Technical Reference page 749

cv_5v4
2016.10.28
need to be serviced multiple times before the read or write command is fully accepted to the single-port
memory controller. The MPFE supports dynamic tuning of the priority and weight settings for each port,
with changes committed into the SDRAM controller at fixed intervals of time.
Arbitration settings are applied to each port of the MPFE. The memory controller supports a mix of
Avalon-MM and AXI protocols. As defined in the "Port Mappings" section, the Avalon-MM ports
consume a single command port while the AXI ports consume a pair of command ports to support
simultaneous read and write transactions. In total, there are ten command ports for the MPFE to arbitrate.
The following table illustrates the command port mapping within the HPS as well as the ports exposed to
the FPGA fabric.
Table 11-4: HPS SDRAM MPFE Command Port Mapping
Command Port
0, 2, 4
1, 3, 5
6
7
8
9
When the FPGA ports are configured for AXI, the command ports are always assigned in groups of two
starting with even number ports 0, 2, or 4 assigned to the read command channel. For example, if you
configure the first FPGA-to-SDRAM port as AXI and the second port as Avalon-MM, you can expect the
following mapping:
• Command port 0 = AXI read
• Command port 1 = AXI write
• Command port 2 = Avalon-MM read and write
Setting the MPFE Priority
The priority of each of the ten command ports is configured through the
mppriority
0x0 and the highest priority is 0x7. The bits are mapped in ascending order with bits [2:0] assigned to
command port 0 and bits [29:27] assigned to command port 9.
SDRAM Controller Subsystem
Send Feedback
Allowed Functions
FPGA fabric AXI read
command ports
FPGA fabric Avalon-MM read
or write command ports
FPGA fabric AXI write
command ports
FPGA fabric Avalon-MM
read or write command
ports
L3 AXI read command port
MPU AXI read command port 64-bit data
L3 AXI write command port
MPU AXI write command
port
register. This 30-bit register uses 3 bits per port to configure the priority. The lowest priority is
MPFE Multi-Port Arbitration
Data Size
32-bit to 256-bit data
32-bit data
32-bit data
64-bit data
userpriority
11-11
field of the
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