Altera cyclone V Technical Reference page 621

Hard processor system
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cv_5v4
2016.10.28
Module Instance
lwhps2fpgaregs
Offset:
0x1FE4
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
periph_id_1 Fields
Bit
7:0
jep3to0_pn11to8
periph_id_2
Peripheral ID2
Module Instance
lwhps2fpgaregs
Offset:
0x1FE8
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
HPS-FPGA Bridges
Send Feedback
0xFF400000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
JEP106[3:0], Part Number [11:8]
0xFF400000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
periph_id_2
Register Address
0xFF401FE4
21
20
19
18
5
4
3
2
jep3to0_pn11to8
RO 0xB3
Access
Register Address
0xFF401FE8
8-39
17
16
1
0
Reset
RO
0xB3
Altera Corporation

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