Altera cyclone V Technical Reference page 852

cv_5v4
2016.10.28
maintains additional cache or multi-plane read command sequencing for continuous streaming of data
from the flash device.
Pipeline read-ahead commands can read data from the queue in this interleaved fashion. The parameter
<PP> denotes the total number of pages in multiples of the number of planes available, and the block
address must be plane-aligned, which keeps the page address constant while incrementing the block
address for each page-size chunk of data. After reading from every plane, the NAND flash controller
increments the page address and resets the block address to the initial address. You can also use pipeline
write-ahead commands in multi-plane mode. The write operation works similarly to the read operation,
holding the page address constant while incrementing the block address until all planes are written.
Note: The same four-entry queue is used to queue the address and page count for pipeline read-ahead and
write-ahead commands. This commonality requires that you use MAP01 commands to read out all
pages for a pipeline read-ahead command before the next pipeline command can be processed.
Similarly, you must write to all pages pertaining to pipeline write-ahead command before the next
pipeline command can be processed.
Because the value of the
pipeline read-ahead or write-ahead behavior, it can only be changed when the pipeline registers are empty.
When the host issues a pipeline read-ahead command, and the flash controller is idle, the load operation
occurs immediately.
Note: The read-ahead command does not return the data to the host, and the write-ahead command does
not write data to the flash address. The NAND flash controller loads the read data. The read data is
returned to the host only when the host issues MAP01 commands to read the data. Similarly, the
flash controller loads the write data, and writes it to the flash only when the host issues MAP01
commands to write the data.
Set Up a Single Area for Pipeline Read-Ahead
To set up an area for pipeline read-ahead, perform the following steps:
1. Write to the command register, setting the
address of the block to pre-read.
2. Write 0x20<PP> to the
number of pages to pre-read. The pages must not cross a block boundary. If a block boundary is
crossed, the NAND flash controller generates an unsupported command (
drops the command.
The read-ahead command is a hint to the flash device to start loading the next page in the page buffer as
soon as the previous page buffer operation has completed. After you set up the read-ahead, use a MAP01
command to actually read the data. In the MAP01 command, specify the same starting address as in the
read-ahead.
If the read command received following a pipeline read-ahead request is not to a pre-read page, then an
interrupt bit is set to 1 and the pipeline read-ahead or write-ahead registers are cleared. You must issue a
new pipeline read-ahead request to re-load the same data. You must use MAP01 commands to read all of
the data that is pre-read before the NAND flash controller returns to the idle state.
Pipeline Write-Ahead Function
The pipeline write-ahead function allows for a continuous writing of the flash memory. While data is
written with MAP01 commands in a consecutive or multi-plane address pattern, the NAND flash
NAND Flash Controller
Send Feedback
bit of the
flag multiplane_operation
CMD_MAP
register, where the 0 sets this command as a read-ahead and <PP> is the
Data
Set Up a Single Area for Pipeline Read-Ahead
register in the
config
field to 2 and the
BLK_ADDR
unsup_cmd
13-31
group determines
field to the starting
) interrupt and
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