Altera cyclone V Technical Reference page 548

Hard processor system
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7-100
fn_mod_ahb
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
fn_mod2 Fields
Bit
0
bypass_merge
fn_mod_ahb
Controls how AHB-lite burst transactions are converted to AXI tranactions.
Module Instance
l3regs
Offset:
0x42028
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
Controls bypass merge of upsizing/downsizing.
Value
0x0
0x1
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Reserved
Description
Description
The network can alter transactions.
The network does not alter any transactions
that could pass through the upsizer legally
without alteration.
Base Address
0xFF800000
21
20
19
18
5
4
3
2
Access
Register Address
0xFF842028
System Interconnect
cv_5v4
2016.10.28
17
16
1
0
bypass_
merge
RW 0x0
Reset
RW
0x0
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