Altera cyclone V Technical Reference page 937

Hard processor system
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13-116
ECCCorInfo_b23
Bit
6:0
max_errors_b0
ECCCorInfo_b23
ECC Error correction Information register. Controller updates this register when it completes a
transaction. The values are held in this register till a new transaction completes.
Module Instance
nandregs
Offset:
0x660
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
uncor_
err_b3
RO 0x0
ECCCorInfo_b23 Fields
Bit
15
uncor_err_b3
14:8
max_errors_b3
Altera Corporation
Name
Maximum of number of errors corrected per sector in
Bank0. This field is not valid for uncorrectable errors.
A value of zero indicates that no ECC error occurred
in last completed transaction.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
max_errors_b3
RO 0x0
Name
Uncorrectable error occurred while reading pages for
last transaction in Bank3. Uncorrectable errors also
generate interrupts in intr_statusx register.
Maximum of number of errors corrected per sector in
Bank3. This field is not valid for uncorrectable errors.
A value of zero indicates that no ECC error occurred
in last completed transaction.
Description
Base Address
0xFFB80000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
uncor
_err_
b2
RO
0x0
Description
Access
Register Address
0xFFB80660
21
20
19
18
5
4
3
2
max_errors_b2
RO 0x0
Access
NAND Flash Controller
cv_5v4
2016.10.28
Reset
RO
0x0
17
16
1
0
Reset
RO
0x0
RO
0x0
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