Altera cyclone V Technical Reference page 896

Hard processor system
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cv_5v4
2016.10.28
first_block_of_next_plane
The starting block address of the next plane in a multi plane device.
Module Instance
nandregs
Offset:
0x270
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
first_block_of_next_plane Fields
Bit
15:0
value
write_protect
This register is used to control the assertion/de-assertion of the WP# pin to the device.
Module Instance
nandregs
Offset:
0x280
Access:
RW
NAND Flash Controller
Send Feedback
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
This values informs the controller of the plane
structure of the device. In case the device is a multi
plane device and the value here is 1, the controller
understands that the next plane starts from Block
number 1 and in conjunction with the number of
planes parameter can decide upon the distribution of
blocks in a plane in the device.
0xFFB80000
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
value
RW 0x1
Description
Base Address
first_block_of_next_plane
Register Address
0xFFB80270
21
20
19
18
5
4
3
2
Access
Register Address
0xFFB80280
13-75
17
16
1
0
Reset
RW
0x1
Altera Corporation

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