Altera cyclone V Technical Reference page 889

Hard processor system
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13-68
rdwr_en_lo_cnt
Bit
rdwr_en_lo_cnt
Read/Write Enable low pulse width
Module Instance
nandregs
Offset:
0x1F0
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
Altera Corporation
Name
• 4'h0 - This value informs the controller that the
copyback sequence to follow is, C00, Address, C35,
C85, Address, C10
• 4'h1 - This value informs the controller that the
copyback sequence to follow is, C00, Address, C30,
C8C, Address, C10
• 4'h2 - This value informs the controller that the
copyback sequence to follow is, C00, Address, C8A,
Address, C10
• 4'h3 - This value informs the controller that the
copyback sequence to follow is of a four plane
copyback sequence, C00, Address, C03, Address,
C03, Address, C03, Address, C8A, Address, C11,
C8A, Address, C11, C8A, Address, C11, C8A,
Address, C10.
• 4'h4 - This value informs the controller that the
copyback sequence to follow is of a two plane
copyback sequence, C00, Address, C35, C00,
Address, C35, C85, Address, C11, C81, Address,
C10.
• 4'h5 - This value informs the controller that the
copyback sequence to follow is of a two plane
copyback sequence, C60, Address, C60, Address,
C35, C85, Address, C11, C81, Address, C10.
• 4'h6 - This value informs the controller that the
copyback sequence to follow is of a two plane
copyback sequence, C00, Address, C00, Address,
C35, C85, Address, C11, C80, Address, C10.
• 4'h7 - This value informs the controller that the
copyback sequence to follow is of a two plane
copyback sequence, C60, Address, C60, Address,
C30, C8C, Address, C11, C8C, Address, C10.
• 4'h8 - 4'h15 - Reserved.
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Description
Base Address
0xFFB80000
Access
Register Address
0xFFB801F0
NAND Flash Controller
cv_5v4
2016.10.28
Reset
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