7-4
Functional Description of the Interconnect
Figure 7-2: Main Connectivity Matrix
Related Information
Interconnect Block Diagram
Functional Description of the Interconnect
Master to Slave Connectivity Matrix
The interconnect is a partially-connected crossbar. The following table shows the connectivity matrix of all
the master and slave interfaces of the interconnect.
Altera Corporation
Masters
L3 Master Peripheral Switch (1)
L2 Cache Master 0
FPGA-to-HPS Bridge
DMA
DAP
on page 7-2
Slaves
cv_5v4
2016.10.28
System Interconnect
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