Altera cyclone V Technical Reference page 288

5-94
Pin Mux Control Group Register Descriptions
GENERALIO13
This register is used to control the peripherals connected to uart0_rx Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO14
This register is used to control the peripherals connected to uart0_tx Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO15
This register is used to control the peripherals connected to i2c0_sda Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO16
This register is used to control the peripherals connected to i2c0_scl Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO17
This register is used to control the peripherals connected to can0_rx Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO18
This register is used to control the peripherals connected to can0_tx Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO8
This register is used to control the peripherals connected to nand_dq3 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO9
This register is used to control the peripherals connected to nand_dq4 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO10
This register is used to control the peripherals connected to nand_dq5 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO11
This register is used to control the peripherals connected to nand_dq6 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
MIXED1IO12
This register is used to control the peripherals connected to nand_dq7 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
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cv_5v4
2016.10.28
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