Event Trace - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
Changes in processor instruction set state
Changes in processor security state
Context ID changes
Entry to and return from debug state when Halting
debug mode is enabled
The PTM optionally provides additional information for waypoints, including the following:
• Processor cycle count between waypoints
• Global timestamp values
• Target addresses for direct branches
Related Information
CoreSight Debug and Trace
•
ARM Infocenter
•
For more information about the PTM, refer to the CoreSight PTM-A9 Technical Reference Manual,
available on the ARM Infocenter website.

Event Trace

Events from each processor can be used as inputs to the PTM. The PTM can use these events as trace and
trigger conditions.
Related Information
Performance Monitoring Unit
•
ARM Infocenter
•
For more information about the trigger and trace capabilities, refer to the CoreSight PTM-A9
Technical Reference Manual, Revision r1p0, available on the ARM Infocenter website.
Cross-Triggering
The PTM can export trigger events and perform actions on trigger inputs. The cross-trigger signals
interface with other HPS debugging components including the FPGA fabric. Also, a breakpoint in one
processor can trigger a break in the other.
Related Information
CoreSight Debug and Trace
For detailed information about cross-triggering and about debugging hardware in the MPU, refer to the
CoreSight Debug and Trace chapter.
Cortex-A9 Microprocessor Unit Subsystem
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Additional Waypoint Information
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Event Trace
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