Altera cyclone V Technical Reference page 767

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
Name
waitrequest
burstcount
The read and write interfaces are configured to the same size. The byte-enable size scales with the data bus
size.
Related Information
Avalon Interface Specifications
Information about the Avalon-MM protocol
Avalon-MM Write-Only Port
The Avalon-MM write-only ports are standard Avalon-MM ports used to dispatch write operations. Each
configured Avalon-MM write port consists of the signals listed in the following table.
Table 11-16: Avalon-MM Write-Only Port Signals
Name
reset
clk
write
address
writedata
byteenable
waitrequest
burstcount
SDRAM Controller Subsystem
Send Feedback
Bit Width
Input/Output
1
11
Bits
1
1
1
32
32, 64, 128, or 256
4, 8, 16, 32
1
11
Direction
Out
Indicates need for additional cycles to
complete a transaction
In
Transaction burst length. The value of the
maximum
burstcount
power of 2.
Direction
In
Reset
In
Clock
In
Indicates write transaction
In
Address of the transaction
In
Write data for a transaction
In
Byte enables for each write byte
Out
Indicates need for additional cycles to
complete a transaction
In
Transaction burst length
Avalon-MM Write-Only Port
Function
parameter must be a
Function
Altera Corporation
11-29

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents