Altera cyclone V Technical Reference page 901

Hard processor system
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13-80
device_id
manufacturer_id Fields
Bit
7:0
value
device_id
Module Instance
nandregs
Offset:
0x310
Access:
RO
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
device_id Fields
Bit
7:0
value
device_param_0
Module Instance
nandregs
Offset:
0x320
Access:
RO
Altera Corporation
Name
Manufacturer ID
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Device ID. This register is updated only for Legacy
NAND devices.
Description
Base Address
0xFFB80000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Base Address
0xFFB80000
Access
Register Address
0xFFB80310
21
20
19
18
5
4
3
2
value
RO 0x0
Access
Register Address
0xFFB80320
NAND Flash Controller
cv_5v4
2016.10.28
Reset
RW
0x0
17
16
1
0
Reset
RO
0x0
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