Altera cyclone V Technical Reference page 232

Hard processor system
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5-38
vioctrl
hwctrl
on page 5-42
Activate freeze or thaw operations on VIO channel 1 (HPS IO bank 2 and bank 3) and monitor for
completeness and the current state. These fields interact with the hardware state machine in the Freeze
Controller. These fields can be accessed independent of the value of SRC1.VIO1 although they only have
an effect on the VIO channel 1 freeze signals when SRC1.VIO1 is setup to have the hardware state
machine be the freeze signal source. All fields are only reset by a cold reset (ignore warm reset).
vioctrl
Used to drive freeze signals to HPS VIO banks. The register array index corresponds to the freeze channel.
Freeze channel 0 provides freeze signals to VIO bank 0 and 1. Freeze channel 1 provides freeze signals to
VIO bank 2 and 3. Only drives freeze signals when SRC.VIO1 is set to SW. Freeze channel 2 provides
freeze signals to VIO bank 4. All fields are only reset by a cold reset (ignore warm reset). The following
equation determines when the weak pullup resistor is enabled: enabled = ~wkpullup | (CFF & cfg &
tristate) where CFF is the value of weak pullup as set by IO configuration
Module Instance
sysmgr
Offset:
0x40
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
vioctrl Fields
Bit
4
slew
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Reserved
Name
Controls IO slew-rate
Value
0x0
0x1
Base Address
0xFFD08000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
Description
Description
Slew-rate forced to slow.
Slew-rate controlled by IO configuration.
Register Address
0xFFD08040
21
20
19
18
5
4
3
2
slew
wkpul
trist
lup
ate
RW
0x0
RW
RW
0x0
0x0
Access
cv_5v4
2016.10.28
17
16
1
0
busho
cfg
ld
RW 0x0
RW
0x0
Reset
RW
0x0
System Manager
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