Altera cyclone V Technical Reference page 286

5-92
Pin Mux Control Group Register Descriptions
FLASHIO3
This register is used to control the peripherals connected to sdmmc_d1 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO4
This register is used to control the peripherals connected to sdmmc_d4 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO5
This register is used to control the peripherals connected to sdmmc_d5 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO6
This register is used to control the peripherals connected to sdmmc_d6 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO7
This register is used to control the peripherals connected to sdmmc_d7 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO8
This register is used to control the peripherals connected to sdmmc_clk_in Only reset by a cold reset
(ignores warm reset). NOTE: These registers should not be modified after IO configuration.There is no
support for dynamically changing the Pin Mux selections.
FLASHIO9
This register is used to control the peripherals connected to sdmmc_clk Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO10
This register is used to control the peripherals connected to sdmmc_d2 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
FLASHIO11
This register is used to control the peripherals connected to sdmmc_d3 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO0
This register is used to control the peripherals connected to trace_clk Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
GENERALIO1
This register is used to control the peripherals connected to trace_d0 Only reset by a cold reset (ignores
warm reset). NOTE: These registers should not be modified after IO configuration.There is no support for
dynamically changing the Pin Mux selections.
Altera Corporation
on page 5-120
on page 5-121
on page 5-121
on page 5-122
on page 5-123
on page 5-124
on page 5-124
on page 5-125
on page 5-126
on page 5-127
on page 5-127
cv_5v4
2016.10.28
System Manager
Send Feedback