Altera cyclone V Technical Reference page 868

cv_5v4
2016.10.28
rb_pin_enabled
Interrupt or polling mode. Ready/Busy pin is enabled from device.
Module Instance
nandregs
Offset:
0x60
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
rb_pin_enabled Fields
Bit
3
bank3
2
bank2
1
bank1
0
bank0
NAND Flash Controller
Send Feedback
0xFFB80000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Reserved
Name
Sets Denali Flash Controller in interrupt pin or
polling mode [list][*]1 - R/B pin enabled for bank 3.
Interrupt pin mode. [*]0 - R/B pin disabled for bank
3. Polling mode.[/list]
Sets Denali Flash Controller in interrupt pin or
polling mode [list][*]1 - R/B pin enabled for bank 2.
Interrupt pin mode. [*]0 - R/B pin disabled for bank
2. Polling mode.[/list]
Sets Denali Flash Controller in interrupt pin or
polling mode [list][*]1 - R/B pin enabled for bank 1.
Interrupt pin mode. [*]0 - R/B pin disabled for bank
1. Polling mode.[/list]
Sets Denali Flash Controller in interrupt pin or
polling mode [list][*]1 - R/B pin enabled for bank 0.
Interrupt pin mode. [*]0 - R/B pin disabled for bank
0. Polling mode.[/list]
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Description
rb_pin_enabled
Register Address
0xFFB80060
21 20 19 18
5 4 3 2
bank3 bank2
RW RW
0x0 0x0
Access
13-47
17 16
1 0
bank1 bank0
RW RW 0x1
0x0
Reset
RW 0x0
RW 0x0
RW 0x0
RW 0x1
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