Command Mapping - Altera cyclone V Technical Reference

13-8
Indexed Addressing Host Usage
Table 13-5: Register Map for Indexed Addressing
Register Name
Control
Data
Related Information

Command Mapping

•
• HPS Peripheral Region Address Map
Indexed Addressing Host Usage
The host uses indexed addressing as follows:
1. Program the 32-bit index-address field into the
provides the flash address parameters to the NAND flash controller.
2. Perform a 32-bit read or write in the
3. Perform additional 32-bit reads and writes if they are in the same page and block in flash memory.
It is unnecessary to write to the control register for every data transfer if a group of data transfers targets
the same page and block address. For example, you can write the control register at the beginning of a
page with the block and page address, and then read or write the entire page by directing consecutive
transactions to the
Command Mapping
The NAND flash controller supports several flash controller-specific MAP commands, providing an
abstraction level for programming a NAND flash device. By using the MAP commands, you can avoid
directly programming device-specific commands. Using this abstraction layer provides enhanced
performance. Commands take multiple cycles to send off-chip. The MAP commands let you initiate
commands and let the flash controller sequence them off-chip to the NAND device.
The NAND flash controller supports the following flash controller-specific MAP commands:
• MAP00 commands—boot-read or buffer read/write during read-modify-write operations
• MAP01 commands—memory arrays read/write
• MAP10 commands—NAND flash controller commands
• MAP11 commands—low-level direct access
Altera Corporation
Offset Address
0x0 Identifies the page of flash memory to be read or written. Software
writes the 32-bit control information consisting of map command
type, block, and page address. The upper four bits must be set to 0.
For specific usage of the
Mapping".
0x10 The
Data
reading from or writing to locations starting at this offset, the
software reads directly from or writes directly to the page and block
of NAND flash memory specified by the
register is always addressed on 32-bit word boundaries, although the
physical flash device has an 8-bit-wide data path.
on page 13-8
register.
Data
Control
register is a page-size window into the NAND flash. By
on page 1-17
register in the
Control
register.
Data
Usage
register, refer to "Command
register. The Data
Control
region. This action
nanddata
NAND Flash Controller
cv_5v4
2016.10.28
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