Altera cyclone V Technical Reference page 205

cv_5v4
2016.10.28
EMAC Group
Register
ctrl on page 5-44
l3master on page 5-
46
DMA Controller Group
Register
ctrl on page 5-51
persecurity on page
5-52
Preloader (initial software) Group
Register
handoff on page 5-53
Boot ROM Code Register Group
Register
ctrl on page 5-54
cpu1startaddr
5-56
initswstate on page
5-57
initswlastld
5-57
bootromswstate
page 5-58
System Manager
Send Feedback
Offset Width Acces
0x60
0x64
Offset Width Acces
0x70
0x74
Offset Width Acces
0x80
Offset Width Acces
0xC0
on page 0xC4
0xC8
on page 0xCC
on 0xD0
System Manager Module Address Map
Reset Value
s
32 RW 0xA
32 RW 0x0
Reset Value
s
32 RW 0x0
32 RW 0x0
Reset Value
s
32 RW 0x0
Reset Value
s
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
32 RW 0x0
Description
Control Register
EMAC L3 Master AxCACHE
Register
Description
Control Register
Peripheral Security Register
Description
Preloader to OS Handoff Informa‐
tion
Description
Control Register
CPU1 Start Address Register
Preloader (initial software)​ State
Register
Preloader (initial software)​ Last
Image Loaded Register
Boot ROM Software State Register
Altera Corporation
5-11