Altera cyclone V Technical Reference page 255

Hard processor system
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cv_5v4
2016.10.28
datastart Fields
Bit
15:0
offset
length
Length of region in On-chip RAM for CRC validation.
Module Instance
sysmgr
Offset:
0xE8
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
length Fields
Bit
15:0
size
System Manager
Send Feedback
Name
Contains the byte offset into the On-chip RAM of the
start of the On-chip RAM region for the warm boot
CRC validation. The offset must be an integer
multiple of 4 (i.e. aligned to a word)​. The Boot ROM
code will set the top 16 bits to 0xFFFF and clear the
bottom 2 bits.
0xFFD08000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
Contains the length (in bytes) of the region in the On-
chip RAM for the warm boot CRC validation. If the
length is 0, the Boot ROM won't perform CRC
calculation and CRC check to avoid overhead caused
by CRC validation. If the START + LENGTH exceeds
the maximum offset into the On-chip RAM, the Boot
ROM won't boot from the On-chip RAM. The length
must be an integer multiple of 4. The Boot ROM code
will clear the top 16 bits and the bottom 2 bits.
Description
Base Address
Bit Fields
25
24
23
22
Reserved
9
8
7
6
size
RW 0x0
Description
length
Access
Register Address
0xFFD080E8
21
20
19
18
5
4
3
2
Access
5-61
Reset
RW
0x0
17
16
1
0
Reset
RW
0x0
Altera Corporation

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