Altera cyclone V Technical Reference page 256

Hard processor system
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5-62
execution
execution
Offset into On-chip RAM to enter to on a warm boot.
Module Instance
sysmgr
Offset:
0xEC
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31
30
15
14
execution Fields
Bit
15:0
offset
crc
Length of region in On-chip RAM for CRC validation.
Module Instance
sysmgr
Offset:
0xF0
Access:
RW
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29
28
27
26
13
12
11
10
Name
Contains the byte offset into the On-chip RAM that
the Boot ROM jumps to if the CRC validation
succeeds. The Boot ROM code sets the top 16 bits to
0xFFFF when it reads this register, but does not
change the contents of this register.
Base Address
0xFFD08000
Bit Fields
25
24
23
22
Reserved
9
8
7
6
offset
RW 0x0
Description
Base Address
0xFFD08000
Register Address
0xFFD080EC
21
20
19
18
5
4
3
2
Access
Register Address
0xFFD080F0
cv_5v4
2016.10.28
17
16
1
0
Reset
RW
0x0
System Manager
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