Altera cyclone V Technical Reference page 519

cv_5v4
2016.10.28
fn_mod_bm_iss Fields
Bit
1
wr
0
rd
L4 SPIM Register Descriptions
Registers associated with the L4 SPIM master. This master is used to access the APB slaves on the L4 SPIM
bus.
Offset:
0x4000
fn_mod_bm_iss
Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding
transactions.
fn_mod_bm_iss
Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding
transactions.
Module Instance
l3regs
Offset:
0x6008
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
System Interconnect
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Name
Value
0x0
0x1
Value
0x0
0x1
on page 7-71
0xFF800000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
Description
Description
Multiple outstanding write transactions
Only a single outstanding write transaction
Description
Multiple outstanding read transactions
Only a single outstanding read transaction
Base Address
L4 SPIM Register Descriptions
Access
Register Address
0xFF806008
7-71
Reset
RW 0x0
RW 0x0
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