Clocks - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
The JTAG commands and
Similarly, the
command protocol.
Table 6-2: JTAG-AP Byte Command Protocol
7
0 Opcode
Payload
1 0
1 0
1 1
1 1
Related Information
fifosinglebyte
•
Information about configuring the scan manager's fifosinglebyte register
fifodoublebyte
•
Information about configuring the scan manager's fifodoublebyte register
fifotriplebyte
•
Information about configuring the scan manager's fifotriplebyte register
fifoquadbyte
•
Information about configuring the scan manager's fifoquadbyte register
stat
• on page 6-9
Information about configuring the scan manager's stat register
Scan Manager Address Map and Register Definitions
•
• http://infocenter.arm.com
For details about the byte command protocol, refer to the DAP Components chapter of the CoreSight
SoC Technical Reference Manual , which you can download from the ARM Infocenter website.

Clocks

The scan manager is connected to the
The scan manager generates two clocks. One clock routes to the control block of the FPGA portion of the
SoC device with a frequency of
to the HPS I/O scan chains with a frequency of
100 MHz.
Note: The
support 60 Mbps rates. When the SPI master is running faster than what is supported by the scan
manager, the scan manager cannot be used and must be held in reset.
Scan Manager
Send Feedback
data must be sent to the JTAG-AP using an encoded byte protocol.
TDI
data received from JTAG-AP is encoded. All commands are 8 bits wide in the byte
TDO
Bits of the Command Byte
6 5
0 Opcode
Payload
1 X
0 X
1 X
on page 6-13
on page 6-13
on page 6-14
on page 6-15
spi_m_clk
can potentially run faster than the scan manager supports so that SPI masters can
spi_m_clk
4 3 2
X X
X X
X X
on page 6-8
clock generated by the clock manager.
spi_m_clk
/ 6 and runs at a maximum of 33 MHz. The other clock routes
/ 2 and runs at a maximum frequency of
sp i_m_clk
Clocks
1 0
TMS
TDI_TDO
X X Reserved
X X Reserved
X X Reserved
Altera Corporation
6-7
Opcode