Functional Description Of The Fpga Manager; Fpga Manager Building Blocks - Altera cyclone V Technical Reference

cv_5v4
2016.10.28
The FPGA manager consists of the following blocks:
• Configuration slave interface—accepts and transfers the configuration image to the data interface.
• Register slave interface—accesses the CSRs in the FPGA manager.
• Data—accepts the FPGA configuration image from the configuration slave interface and sends it to the
FPGA CB.
• Control—controls the FPGA CB.
• Monitor—monitors the configuration signals in the FPGA CB and sends interrupts to the MPU
subsystem.
• Fabric I/O—reads and writes signals from or to the FPGA fabric.

Functional Description of the FPGA Manager

FPGA Manager Building Blocks

The FPGA manager has the two blocks - fabric I/O and monitor.
Related Information
FPGA Manager Address Map and Register Definitions
Fabric I/O
The fabric I/O block contains the following registers to allow simple low-latency communication between
the HPS and the FPGA fabric:
• General-purpose input register (
• General-purpose output register (
• Boot handshaking input register (
These registers are only valid when the FPGA is in user mode. Reading from these registers while the
FPGA is not in user mode provides undefined data.
The 32 general-purpose input signals from the FPGA fabric are read by reading the
register slave interface. The 32 general-purpose output signals to the FPGA fabric are generated from
writes to the
Address Map and Register Definitions
The boot handshake input signals from the FPGA fabric are read by reading the
f2h_boot_from_fpga_ready
to the boot ROM. The
boot ROM code fails to boot from the primary boot flash device. In this case, the boot ROM code checks
these two handshaking signals to determine if it should use the boot code hosted in the FPGA memory as
the next stage in the boot process.
There is no interrupt support for this block.
Related Information
FPGA Manager Address Map and Register Definitions
FPGA Manager
Send Feedback
gpi
gpo
misci
register. For more information about FPGA manager registers, refer to
gpo
signal indicates that the FPGA fabric is ready to send proloader information
f2h_boot_from_fpga_on_failure
Functional Description of the FPGA Manager
on page 4-9
)
)
)
on page 4-9.
signal serves as a fallback in the event that the
on page 4-9
4-3
register using the
gpi
FPGA Manager
register. The
misci
Altera Corporation