Altera cyclone V Technical Reference page 299

Hard processor system
Hide thumbs Also See for cyclone V:
Table of Contents

Advertisement

cv_5v4
2016.10.28
GPLMUX57
Selection between GPIO and LoanIO output and output enable for GPIO57 and LoanIO57. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX58
Selection between GPIO and LoanIO output and output enable for GPIO58 and LoanIO58. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX59
Selection between GPIO and LoanIO output and output enable for GPIO59 and LoanIO59. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX60
Selection between GPIO and LoanIO output and output enable for GPIO60 and LoanIO60. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX61
Selection between GPIO and LoanIO output and output enable for GPIO61 and LoanIO61. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX62
Selection between GPIO and LoanIO output and output enable for GPIO62 and LoanIO62. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX63
Selection between GPIO and LoanIO output and output enable for GPIO63 and LoanIO63. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX64
Selection between GPIO and LoanIO output and output enable for GPIO64 and LoanIO64. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
GPLMUX65
Selection between GPIO and LoanIO output and output enable for GPIO65 and LoanIO65. These signals
drive the Pin Mux. The Pin Mux must be configured to use GPIO/LoanIO in addition to these settings
Only reset by a cold reset (ignores warm reset). NOTE: These registers should not be modified after IO
configuration.There is no support for dynamically changing the Pin Mux selections.
System Manager
Send Feedback
on page 5-220
on page 5-221
on page 5-222
on page 5-222
on page 5-223
on page 5-224
on page 5-225
on page 5-226
on page 5-226
Pin Mux Control Group Register Descriptions
5-105
Altera Corporation

Hide quick links:

Advertisement

Table of Contents
loading

Table of Contents