Altera cyclone V Technical Reference page 628

8-46
fn_mod_bm_iss
fn_mod_bm_iss
Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding
transactions.
Module Instance
lwhps2fpgaregs
Offset:
0x3008
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
fn_mod_bm_iss Fields
Bit
1
wr
0
rd
ahb_cntl
Sets the block issuing capability to one outstanding transaction.
Module Instance
lwhps2fpgaregs
Altera Corporation
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
Value
0x0
0x1
Value
0x0
0x1
Base Address
0xFF400000
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Reserved
Description
Description
Multiple outstanding write transactions
Only a single outstanding write transaction
Description
Multiple outstanding read transactions
Only a single outstanding read transaction
Base Address
0xFF400000
Register Address
0xFF403008
21 20 19 18
5 4 3 2
Access
Register Address
0xFF403044
cv_5v4
2016.10.28
17 16
1 0
wr rd
RW RW 0x0
0x0
Reset
RW 0x0
RW 0x0
HPS-FPGA Bridges
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