Altera cyclone V Technical Reference page 517

cv_5v4
2016.10.28
L4 MP Register Descriptions
Registers associated with the L4 MP master. This master is used to access the APB slaves on the L4 MP
bus.
Offset:
0x2000
fn_mod_bm_iss
Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding
transactions.
fn_mod_bm_iss
Sets the issuing capability of the preceding switch arbitration scheme to multiple or single outstanding
transactions.
Module Instance
l3regs
Offset:
0x4008
Access:
RW
Important: To prevent indeterminate system behavior, reserved areas of memory must not be accessed by
31 30
15 14
fn_mod_bm_iss Fields
Bit
1
wr
System Interconnect
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on page 7-69
0xFF800000
software or hardware. Any area of the memory map that is not explicitly defined as a register
space or accessible memory is considered reserved.
29 28 27 26
13 12 11 10
Name
Value
0x0
0x1
Base Address
Bit Fields
25 24 23 22
Reserved
9 8 7 6
Reserved
Description
Description
Multiple outstanding write transactions
Only a single outstanding write transaction
L4 MP Register Descriptions
Register Address
0xFF804008
21 20 19 18
5 4 3 2
Access
7-69
17 16
1 0
wr rd
RW RW 0x0
0x0
Reset
RW 0x0
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